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Embedded Systems Security and TrustZone
2020-09-14 15:23:53 Author:
wiki.ioin.in(查看原文)
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Embedded Systems Security and TrustZone
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1
Introduction
1.1
What to expect?
1.2
Support & Give Back
1.2.1
€ Donate
1.2.2
✓ Report Bugs
1.2.3
♥ Share
1.3
About the Author
2
Interaction with the book
2.1
Overall Structure
2.2
Information Boxes
3
Basics: C language
3.1
Introduction
3.2
C language: General terms and concepts
3.3
C objects and identifiers: Terms and Concepts
3.4
Compiler, Assembler and Linker: Terms and concepts
3.4.1
Assembler terms
3.5
ELF
3.6
Symbols
3.6.1
Symbols: Tools
3.6.2
Symbols: ELF
3.6.3
Symbols: Assembler
3.7
Sections
3.7.1
Sections: Tools
3.7.2
Sections: ELF
3.7.3
Sections: Compiler and Assembler
3.7.4
Sections: Summary
3.8
Literal Pools
3.9
Relocation
3.10
Veneers
3.11
Linker Script
3.12
Excursus: Arm-Thumb interworking and .glue_7 and .glue_7t
4
Basics: Arm M-profile architectures and Cortex-M
4.1
Introduction
4.2
Architectures and Core Implementations
4.3
Arm -M profile (Armv6-M, Armv7-M, Armv8-M)
4.4
Execution Modes and Privilege Levels
4.4.1
Configuration
4.5
Memory System
4.6
Exceptions and Interrupts
4.6.1
System Exception and Vector Table Configuration
4.6.2
NVIC
4.6.3
Masking
4.7
Registers
4.7.1
General-purpose registers
4.7.2
Special-purpose registers
5
Basics: TrustZone-M
5.1
Introduction
5.2
Execution Modes and Privilege Levels (with TrustZone)
5.3
TrustZone in Cortex-M vs -A
5.4
Two worlds: Secure and non-secure
5.4.1
Banked Registers
5.5
IDAU and SAU: Security attribution
5.6
Transitions
5.6.1
Secure function call
5.6.2
Non-secure function call
5.7
System Design: Security Gates and System Security Controllers
5.7.1
System Security Controller
5.7.2
Security wrapper
5.7.3
Block-based Gate
5.7.4
Watermark-based Gate
5.7.5
Select-based Gate
5.7.6
Lite-IDAU
5.7.7
System Security in STM32L5
6
Bare-metal firmware build and boot process (CMSIS Core(M))
6.1
Introduction
6.2
Memory segments
6.2.1
ROM segment
6.2.2
RAM segment
6.2.3
ROM_NSC segment
6.3
ROM segment and Boot Process
6.4
Non-Secure Callable segment
6.5
Calling non-secure world from secure world
6.6
Heap and Stack
6.7
ELF to .bin
7
AAPCS Arm ABI and Runtime view
7.1
Data Types
7.2
Subroutine Call
7.2.1
Passing arguments
7.2.2
Return function values
7.3
Exception Entry and Return
7.4
Excursus: IP register for Interworking
8
TrustZone-M runtime view (CMSIS Core(M))
8.1
Introduction
8.2
SAU initialization (CMSIS)
8.2.1
SAU configuration registers
8.3
Secure function call
8.4
Non-secure function call
8.5
Secure and non-secure exceptions
8.5.1
Exception Entry with transition (S to NS)
8.5.2
Exception Target Security State Configuration
9
STM32L5 and Nucleo-144
9.1
Hardware Overview
9.2
STM32 Product Life Cycle
9.2.1
Readout Protection (RDP)
9.3
Option Bytes
9.4
Memory Map
9.4.1
STM32L5: IDAU and SAU
9.5
Global TrustZone Controller
9.5.1
TrustZone Security Controller (TZSC)
9.5.2
TrustZone Illegal Access Controller (TZIC)
9.5.3
SRAM
9.5.4
Flash
10
Examples: STM32 Nucleo-144
10.1
Tools and Hardware Configuration
10.1.1
STM32CubeIDE Setup
10.2
Secure Random Number Generator (Example 1)
10.2.1
Option Bytes Configuration
10.2.2
GTZC Configuration
10.2.3
Peripheral Configuration
10.2.4
Secure World Implementation
10.2.5
Non-Secure World Implementation
10.3
Appendix
10.3.1
Example 1
11
Core Concepts and Terms
11.1
STM32L5: GTZC and subcomponents
11.2
Lifecycle Configurations
11.3
SRAM Protections
11.4
Flash Protections
11.5
System Security Components
11.6
System Security Design
11.7
Heap
11.8
Stack
11.9
Trustzone: Periphery
11.10
Implementation Defined Attribution Unit
11.11
Security Attribution Unit
11.12
TrustZone-M core components
11.13
Nonsecure function calls
11.14
Secure function calls
11.15
CMSIS
11.16
Interworking
11.17
Arm Registers
11.18
Arm ABI
11.19
Interrupts
11.20
Arm Privilege Levels
11.21
Arm Memory System
11.22
Vector Table
11.23
Arm Exception System
11.24
Arm Architecture Basics
11.25
ELF
11.26
Assembler Instrutions
11.27
Assembler Terms
11.28
Linker Script
11.29
Veneers
11.30
Linking
11.31
Section
11.32
Symbol
11.33
C Basics
11.34
C object
12
Changelog
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