struct hypersecure_vmcb_control {

    struct cr_rd_intercepts_t {

        uint8_t cr_0_rd_intercept : 1;

        uint8_t cr_1_rd_intercept : 1;

        uint8_t cr_2_rd_intercept : 1;

        uint8_t cr_3_rd_intercept : 1;

        uint8_t cr_4_rd_intercept : 1;

        uint8_t cr_5_rd_intercept : 1;

        uint8_t cr_6_rd_intercept : 1;

        uint8_t cr_7_rd_intercept : 1;

        uint8_t cr_8_rd_intercept : 1;

        uint8_t cr_9_rd_intercept : 1;

        uint8_t cr_10_rd_intercept : 1;

        uint8_t cr_11_rd_intercept : 1;

        uint8_t cr_12_rd_intercept : 1;

        uint8_t cr_13_rd_intercept : 1;

        uint8_t cr_14_rd_intercept : 1;

        uint8_t cr_15_rd_intercept : 1;

    } cr_rd_intercepts ;

    struct cr_wr_intercepts_t {

        uint8_t cr_0_wr_intercept : 1;

        uint8_t cr_1_wr_intercept : 1;

        uint8_t cr_2_wr_intercept : 1;

        uint8_t cr_3_wr_intercept : 1;

        uint8_t cr_4_wr_intercept : 1;

        uint8_t cr_5_wr_intercept : 1;

        uint8_t cr_6_wr_intercept : 1;

        uint8_t cr_7_wr_intercept : 1;

        uint8_t cr_8_wr_intercept : 1;

        uint8_t cr_9_wr_intercept : 1;

        uint8_t cr_10_wr_intercept : 1;

        uint8_t cr_11_wr_intercept : 1;

        uint8_t cr_12_wr_intercept : 1;

        uint8_t cr_13_wr_intercept : 1;

        uint8_t cr_14_wr_intercept : 1;

        uint8_t cr_15_wr_intercept : 1;

    } cr_wr_intercepts ;

    struct dr_rd_intercepts_t {

        uint8_t dr_0_rd_intercept : 1;

        uint8_t dr_1_rd_intercept : 1;

        uint8_t dr_2_rd_intercept : 1;

        uint8_t dr_3_rd_intercept : 1;

        uint8_t dr_4_rd_intercept : 1;

        uint8_t dr_5_rd_intercept : 1;

        uint8_t dr_6_rd_intercept : 1;

        uint8_t dr_7_rd_intercept : 1;

        uint8_t dr_8_rd_intercept : 1;

        uint8_t dr_9_rd_intercept : 1;

        uint8_t dr_10_rd_intercept : 1;

        uint8_t dr_11_rd_intercept : 1;

        uint8_t dr_12_rd_intercept : 1;

        uint8_t dr_13_rd_intercept : 1;

        uint8_t dr_14_rd_intercept : 1;

        uint8_t dr_15_rd_intercept : 1;

    } dr_rd_intercepts ;

    struct dr_wr_intercepts_t {

        uint8_t dr_0_wr_intercept : 1;

        uint8_t dr_1_wr_intercept : 1;

        uint8_t dr_2_wr_intercept : 1;

        uint8_t dr_3_wr_intercept : 1;

        uint8_t dr_4_wr_intercept : 1;

        uint8_t dr_5_wr_intercept : 1;

        uint8_t dr_6_wr_intercept : 1;

        uint8_t dr_7_wr_intercept : 1;

        uint8_t dr_8_wr_intercept : 1;

        uint8_t dr_9_wr_intercept : 1;

        uint8_t dr_10_wr_intercept : 1;

        uint8_t dr_11_wr_intercept : 1;

        uint8_t dr_12_wr_intercept : 1;

        uint8_t dr_13_wr_intercept : 1;

        uint8_t dr_14_wr_intercept : 1;

        uint8_t dr_15_wr_intercept : 1;

    } dr_wr_intercepts ;

    struct excp_vec_intercepts_t {

        uint8_t exception_0_intercept : 1;

        uint8_t exception_1_intercept : 1;

        uint8_t exception_2_intercept : 1;

        uint8_t exception_3_intercept : 1;

        uint8_t exception_4_intercept : 1;

        uint8_t exception_5_intercept : 1;

        uint8_t exception_6_intercept : 1;

        uint8_t exception_7_intercept : 1;

        uint8_t exception_8_intercept : 1;

        uint8_t exception_9_intercept : 1;

        uint8_t exception_10_intercept : 1;

        uint8_t exception_11_intercept : 1;

        uint8_t exception_12_intercept : 1;

        uint8_t exception_13_intercept : 1;

        uint8_t exception_14_intercept : 1;

        uint8_t exception_15_intercept : 1;  

    } excp_vec_intercepts ; 

    struct vec3_t {

        uint8_t pad_full_0[2];

        uint8_t intr_intercept : 1;

        uint8_t nmi_intercept : 1;

        uint8_t smi_intercept : 1;

        uint8_t init_intercept : 1;

        uint8_t vintr_intercept : 1;

        uint8_t cr0_intercept : 1;

        uint8_t idtr_rd_intercept : 1;

        uint8_t gdtr_rd_intercept : 1;

        uint8_t ldtr_rd_intercept : 1;

        uint8_t tr_rd_intercept : 1;

        uint8_t idtr_wr_intercept : 1;

        uint8_t gdtr_wr_intercept : 1;

        uint8_t ldtr_wr_intercept : 1;

        uint8_t tr_wr_intercept : 1;

        uint8_t rdtsc_intercept : 1;

        uint8_t rdpmc_intercept : 1;

        uint8_t pushf_intercept : 1;

        uint8_t popf_intercept : 1;

        uint8_t cpuid_intercept : 1;

        uint8_t rsm_intercept : 1;

        uint8_t iret_intercept : 1;

        uint8_t intn_intercept : 1;

        uint8_t invd_intercept : 1;

        uint8_t pause_intercept : 1;

        uint8_t hlt_intercept : 1;

        uint8_t invlpg_intercept : 1;

        uint8_t invlpga_intercept : 1;

        uint8_t ioio_prot_intercept : 1;

        uint8_t msr_prot_intercept : 1;  //占位1bit，会拦截RDMSR/WRMSR

        uint8_t task_switch_intercept : 1;

        uint8_t ferr_freeze_intercept : 1;

        uint8_t shutdown_events_intercept : 1;

    } vec3 ;

    struct vec4_t {

        uint8_t vmrun_intercept : 1;

        uint8_t vmmcall_intercept : 1;

        uint8_t vmload_intercept : 1;

        uint8_t vmsave_intercept : 1;

        uint8_t stgi_intercept : 1;

        uint8_t clgi_intercept : 1;

        uint8_t skinit_intercept : 1;

        uint8_t rdtscp_intercept : 1;

        uint8_t icebp_intercept : 1;

        uint8_t wbinvd_wbnoinvd_intercept : 1;

        uint8_t monitor_monitorx_intercept : 1;

        uint8_t mwait_mwaitx_intercept : 1;

        uint8_t xsetbvrdpru_intercept : 1;

        uint8_t efer_wr_after_done_intercept : 1;

        uint8_t pad_pre_1 : 2;

        uint8_t cr0_wr_after_done_intercept : 1;

        uint8_t cr1_wr_after_done_intercept : 1;

        uint8_t cr2_wr_after_done_intercept : 1;

        uint8_t cr3_wr_after_done_intercept : 1;

        uint8_t cr4_wr_after_done_intercept : 1;

        uint8_t cr5_wr_after_done_intercept : 1;

        uint8_t cr6_wr_after_done_intercept : 1;

        uint8_t cr7_wr_after_done_intercept : 1;

        uint8_t cr8_wr_after_done_intercept : 1;

        uint8_t cr9_wr_after_done_intercept : 1;

        uint8_t cr10_wr_after_done_intercept : 1;

        uint8_t cr11_wr_after_done_intercept : 1;

        uint8_t cr12_wr_after_done_intercept : 1;

        uint8_t cr13_wr_after_done_intercept : 1;

        uint8_t cr14_wr_after_done_intercept : 1;

        uint8_t cr15_wr_after_done_intercept : 1;

    } vec4 ;

    uint8_t pad_full_2[0x2c];

    uint64_t iopm_base_pa; ///////////////////

    uint8_t pad_full_more[60 - 0x34];

    uint64_t tsc_offset;

    uint32_t guest_asid;

    uint8_t tlb_control;

    uint8_t pad_full_3[19];

    uint64_t exitcode;

    uint64_t exitinfo_v1;

    uint64_t exitinfo_v2;

    uint64_t exitintinfo;

    uint8_t np_enable : 1;

    uint8_t pad_pre_4 : 7;

    uint8_t pad_full_5[31];

    uint64_t ncr3;

    uint8_t pad_full_6[8];

    uint32_t vmcb_clean;

    uint8_t pad_full_7[4];

    uint64_t nRIP;

    uint8_t num_bytes_fetched;

    uint64_t bytes_fetched_low : 56;

    uint64_t bytes_fetched_hi;

    struct vmsa_info_t {

        uint8_t pad_full_8[40];

        uint16_t padding : 12;

        uint64_t vmsa_ptr : 40;

    } vmsa_info ;

} __attribute__ ((packed));